Jun 15th, 2020
Webinar XJTAG Free Hand
On November 25th IPSES with XJTAG organizes a technical webinar on boundary scan. To register, fill in the from on the XJTAG page dedicated to the event and select the date for Italy of November 25th.
The course is free and places are limited
The Webinar will address design, development, testing and production using boundary scan, not only highlighting the uses and benefits offered by the technology, but allowing attendees to program with the platform by connecting to the tool and connecting to a real board.
In particular, the webinar will deal with:
- IEEE 1149.x Standards Overview
- How to communicate with the JTAG chain
- Tool to interact with JTAG devices such as FPGAs or Processors
- Introduction to testing cards using the JTAG chain
- How to describe a circuit in order to enable the JTAG test
- Defect detection using the JTAG connection test
- How to test non-JTAG elements of a card using boundary scan
It is not necessary to have previous knowledge of the JTAG standard. After the seminar the registration will be made available to the participants.