FPGA Courses

IPSES organizes workshops and courses on programmable logics, such as FPGA. Workshops include theoretical basis and practical demonstrations.

Workshop on "programmable logics"

Subjects discussed on this workshop are:

  • Theory of operating
  • Description of the circuit
  • Hardware resources
  • Limits of programmable logics
  • Comparison between sequential and spatial technology
  • FPGA microprocessors
  • Hardware planning with FPGA
  • Practical demonstration: project flow
  • Market offer
  • Conclusions and further developments of the technology

Practical demonstrations showed

  • Flashing LED
  • Two frequencies flashing LED
  • Flashing LED with selectable frequency trough two pushbuttons
  • Management of a rotary encoder.
  • Generation of VGA 640x480 @ 60Hz screens
  • Generations of VGA 800x600 @ 72Hz screens
  • Control of a rectangle trough rotary encoder on a VGA 640x480 screen
  • Microblaze (implementation of a FPGA microprocessor)

Workshop on "development using Xilinx FPGA"

Subjects discussed on this workshop are:

  • Main features of Xilinx FPGA
  • The development environment: Xilinx ISE.
  • Use of the inner resources of the FPGA : Xilinx Architecture wizard.
  • The generator of hardware peripheral: Xilinx Core Generator.
  • Management of the hardware constraints: Xilinx Pace.
  • Environment of simulation and hardware debug: Chipscope Core Inserter.
  • Environment of simulation and hardware debug: Chipscope Pro Analyzer.
  • Environment of simulation and software debug: Modelsim.
  • Hardware configuration: Xilinx Impact.
  • Development environment of third parts
  • Some mentions on development using Linux environment
  • Conclusions and further developments of the technology

Practical demonstrations showed

  • Advanced management of the device reset
  • Advanced management of the clock
  • Creation of a configuration register bank
  • I2C peripheral interface demonstration
  • PWM generation and management
  • Management of interfaces using independent clocks trough FIFO structures

Additional Documents

FPGA IT [201.5 kB]

FPGA EN [167.7 kB]